[PATCH 07/11] dmaengine: dw-axi-dmac: support per channel irq

[Jisheng Zhang <jszhang@xxxxxxxxxx>]

Each channel can have its own irq, support this case.

Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx>
---
 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c    | 48 +++++++++++++++----
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h         |  2 +
 2 files changed, 42 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 796fd0136781..edb1c089a8eb 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -1141,6 +1141,21 @@ static irqreturn_t dw_axi_dma_interrupt(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
+static irqreturn_t dw_axi_dma_ch_interrupt(int irq, void *dev_id)
+{
+	struct axi_dma_chan *chan = dev_id;
+
+	/* Disable DMAC interrupts. We'll enable them after processing channels */
+	axi_chan_irq_sig_set(chan, DWAXIDMAC_IRQ_NONE);
+
+	dw_axi_dma_handle_ch(chan);
+
+	/* Re-enable interrupts */
+	axi_chan_irq_sig_set(chan, DWAXIDMAC_IRQ_DMA_TRF | DWAXIDMAC_IRQ_ALL_ERR);
+
+	return IRQ_HANDLED;
+}
+
 static int dma_chan_terminate_all(struct dma_chan *dchan)
 {
 	struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan);
@@ -1375,6 +1390,8 @@ static int parse_device_properties(struct axi_dma_chip *chip)
 		chip->dw->hdata->axi_rw_burst_len = tmp;
 	}
 
+	chip->dw->hdata->perch_irq = device_property_read_bool(dev, "snps,perch_irq");
+
 	return 0;
 }
 
@@ -1430,14 +1447,29 @@ static int dw_probe(struct platform_device *pdev)
 	if (!dw->chan)
 		return -ENOMEM;
 
-	chip->irq = platform_get_irq(pdev, 0);
-	if (chip->irq < 0)
-		return chip->irq;
-
-	ret = devm_request_irq(chip->dev, chip->irq, dw_axi_dma_interrupt,
-			       IRQF_SHARED, KBUILD_MODNAME, chip);
-	if (ret)
-		return ret;
+	if (hdata->perch_irq) {
+		char irqname[8];
+		for (i = 0; i < hdata->nr_channels; i++) {
+			snprintf(irqname, sizeof(irqname), "ch%u", i);
+			dw->chan[i].irq = platform_get_irq_byname(pdev, irqname);
+			if (dw->chan[i].irq < 0)
+				return dw->chan[i].irq;
+			ret = devm_request_irq(chip->dev, dw->chan[i].irq,
+					       dw_axi_dma_ch_interrupt,
+					       0, KBUILD_MODNAME, &dw->chan[i]);
+			if (ret)
+				return ret;
+		}
+	} else {
+		chip->irq = platform_get_irq(pdev, 0);
+		if (chip->irq < 0)
+			return chip->irq;
+
+		ret = devm_request_irq(chip->dev, chip->irq, dw_axi_dma_interrupt,
+				       IRQF_SHARED, KBUILD_MODNAME, chip);
+		if (ret)
+			return ret;
+	}
 
 	INIT_LIST_HEAD(&dw->dma.channels);
 	for (i = 0; i < hdata->nr_channels; i++) {
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index e9d5eb0fd594..83ac839b4394 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -33,6 +33,7 @@ struct dw_axi_dma_hcfg {
 	/* Register map for DMAX_NUM_CHANNELS <= 8 */
 	bool	reg_map_8_channels;
 	bool	restrict_axi_burst_len;
+	bool	perch_irq;
 };
 
 struct axi_dma_chan {
@@ -48,6 +49,7 @@ struct axi_dma_chan {
 	struct axi_dma_desc		*desc;
 	struct dma_slave_config		config;
 	enum dma_transfer_direction	direction;
+	int				irq;
 	bool				cyclic;
 	/* these other elements are all protected by vc.lock */
 	bool				is_paused;
-- 
2.39.2