On Thu, Oct 20, 2022 at 02:03:22PM +0530, Akhil R wrote:
> Add support for dma-channel-mask so that only the specified channels
> are used. This helps to reserve some channels for the firmware.
>
> This was initially achieved by limiting the channel number to 31 in
> the driver and adjusting the register address to skip channel0 which
> was reserved for a firmware. Now, with this change, the driver can
> align more to the actual hardware which has 32 channels.
>
> Signed-off-by: Akhil R <akhilrajeev@xxxxxxxxxx>
> Reviewed-by: Jon Hunter <jonathanh@xxxxxxxxxx>
> ---
> drivers/dma/tegra186-gpc-dma.c | 37 +++++++++++++++++++++++++++-------
> 1 file changed, 30 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
> index fa9bda4a2bc6..1d1180db6d4e 100644
> --- a/drivers/dma/tegra186-gpc-dma.c
> +++ b/drivers/dma/tegra186-gpc-dma.c
> @@ -161,7 +161,10 @@
> #define TEGRA_GPCDMA_BURST_COMPLETION_TIMEOUT 5000 /* 5 msec */
>
> /* Channel base address offset from GPCDMA base address */
> -#define TEGRA_GPCDMA_CHANNEL_BASE_ADD_OFFSET 0x20000
> +#define TEGRA_GPCDMA_CHANNEL_BASE_ADDR_OFFSET 0x10000
> +
> +/* Default channel mask reserving channel0 */
> +#define TEGRA_GPCDMA_DEFAULT_CHANNEL_MASK 0xfffffffe
>
> struct tegra_dma;
> struct tegra_dma_channel;
> @@ -246,6 +249,7 @@ struct tegra_dma {
> const struct tegra_dma_chip_data *chip_data;
> unsigned long sid_m2d_reserved;
> unsigned long sid_d2m_reserved;
> + u32 chan_mask;
> void __iomem *base_addr;
> struct device *dev;
> struct dma_device dma_dev;
> @@ -1288,7 +1292,7 @@ static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec,
> }
>
> static const struct tegra_dma_chip_data tegra186_dma_chip_data = {
> - .nr_channels = 31,
> + .nr_channels = 32,
This is an ABI break. A new kernel with an old DTB will use 32 channels
instead of 31. You should leave this and use the dma-channel-mask to
enable all 32 channels.
Rob
