On 03-10-22, 10:10, Martin Povišer wrote: > There's a previously unknown part of the controller interface: We have > to assign SRAM carveouts to channels to store their in-flight samples > in. So, obtain the size of the SRAM from a read-only register and divide > it into 2K blocks for allocation to channels. The FIFO depths we > configure will always fit into 2K. > > (This fixes audio artifacts during simultaneous playback/capture on > multiple channels -- which looking back is fully accounted for by having > had the caches in the DMA controller overlap in memory.) This fails to apply for me, please rebase and resend... While fixing, I think it would make sense to s/alloced/allocated perhpas and also fix the indent in split lines to align with preceeding brace (hint checkpatch --strict would tell you) -- ~Vinod
