On 29-08-22, 17:46, Amelie Delaunay wrote: > This patchset (re)introduces STM32 DMA-MDMA chaining feature. > > As the DMA is not able to generate convenient burst transfer on the DDR, > it penalises the AXI bus when accessing the DDR. While it accesses > optimally the SRAM. The DMA-MDMA chaining then consists in having an SRAM > buffer between DMA and MDMA, so the DMA deals with peripheral and SRAM, > and the MDMA with SRAM and DDR. > > The feature relies on the fact that DMA channel Transfer Complete signal > can trigger a MDMA channel transfer and MDMA can clear the DMA request by > writing to DMA Interrupt Clear register. > > A deeper introduction can be found in patch 1. > > Previous implementation [1] has been dropped as nacked. > Unlike this previous implementation (where all the stuff was embedded in > stm32-dma driver), the user (in peripheral drivers using dma) has now to > configure the MDMA channel. Applied, thanks -- ~Vinod
