On Tue, Aug 23, 2022 at 09:15:26PM +0530, Manivannan Sadhasivam wrote: > On Mon, Aug 22, 2022 at 09:53:08PM +0300, Serge Semin wrote: > > This is a final patchset in the series created in the framework of > > my Baikal-T1 PCIe/eDMA-related work: > > > > [1: Done v5] PCI: dwc: Various fixes and cleanups > > Link: https://lore.kernel.org/linux-pci/20220624143428.8334-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/ > > Merged: kernel 6.0-rc1 > > [2: Done v4] PCI: dwc: Add hw version and dma-ranges support > > Link: https://lore.kernel.org/linux-pci/20220624143947.8991-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx > > Merged: kernel 6.0-rc1 > > [3: In-review v5] PCI: dwc: Add generic resources and Baikal-T1 support > > Link: https://lore.kernel.org/linux-pci/20220822184701.25246-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/ > > [4: Done v5] dmaengine: dw-edma: Add RP/EP local DMA support > > Link: ---you are looking at it--- > > > > Note it is very recommended to merge the patchsets in the same order as > > they are listed in the set above in order to have them applied smoothly. > > Nothing prevents them from being reviewed synchronously though. > > > > Please note originally this series was self content, but due to Frank > > being a bit faster in his work submission I had to rebase my patchset onto > > his one. So now this patchset turns to be dependent on the Frank' work: > > > > Link: https://lore.kernel.org/linux-pci/20220524152159.2370739-1-Frank.Li@xxxxxxx/ > > > > Here is a short summary regarding this patchset. The series starts with > > fixes patches. We discovered that the dw-edma-pcie.c driver incorrectly > > initializes the LL/DT base addresses for the platforms with not matching > > CPU and PCIe memory spaces. It is fixed by using the pci_bus_address() > > method to get a correct base address. After that you can find a series of > > the interleaved xfers fixes. It turned out the interleaved transfers > > implementation didn't work quite correctly from the very beginning for > > instance missing src/dst addresses initialization, etc. In the framework > > of the next two patches we suggest to add a new platform-specific > > callback - pci_address() and use it to convert the CPU address to the PCIe > > space address. It is at least required for the DW eDMA remote End-point > > setup on the platforms with not-matching CPU/PCIe address spaces. In case > > of the DW eDMA local RP/EP setup the conversion will be done automatically > > by the outbound iATU (if no DMA-bypass flag is specified for the > > corresponding iATU window). Then we introduce a set of the patches to make > > the DebugFS part of the code supporting the multi-eDMA controllers > > platforms. It starts with several cleanup patches and is closed joining > > the Read/Write channels into a single DMA-device as they originally should > > have been. After that you can find the patches with adding the non-atomic > > io-64 methods usage, dropping DT-region descriptors allocation, replacing > > chip IDs with the device name. In addition to that in order to have the > > eDMA embedded into the DW PCIe RP/EP supported we need to bypass the > > dma-ranges-based memory ranges mapping since in case of the root port DT > > node it's applicable for the peripheral PCIe devices only. Finally at the > > series closure we introduce a generic DW eDMA controller support being > > available in the DW PCIe Root Port/Endpoint driver. > > > > I've tested this series on Qualcomm SM8450 SoC based dev board. So, > > Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > Thanks. > Not sure what is the merging strategy for this one but this series should get > merged into a single tree. Since the PCI patch is touching the designware > driver, merging the series into dmaengine tree might result in conflict later. Right, the series [PATCH v5 00/20] PCI: dwc: Add generic resources and Baikal-T1 support is supposed to be merged in first. Then this one will get to be applied with no conflicts. That's what I imply in the head of the cover-letter. -Sergey > > Thanks, > Mani > > > Link: https://lore.kernel.org/linux-pci/20220324014836.19149-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/ > > Changelog v2: > > - Drop the patches: > > [PATCH 1/25] dmaengine: dw-edma: Drop dma_slave_config.direction field usage > > [PATCH 2/25] dmaengine: dw-edma: Fix eDMA Rd/Wr-channels and DMA-direction semantics > > since they are going to be merged in in the framework of the > > Frank's patchset. > > - Add a new patch: "dmaengine: dw-edma: Release requested IRQs on > > failure." > > - Drop __iomem qualifier from the struct dw_edma_debugfs_entry instance > > definition in the dw_edma_debugfs_u32_get() method. (@Manivannan) > > - Add a new patch: "dmaengine: dw-edma: Rename DebugFS dentry variables to > > 'dent'." (@Manivannan) > > - Slightly extend the eDMA name array size. (@Manivannan) > > - Change the specific DMA mapping comment a bit to being > > clearer. (@Manivannan) > > - Add a new patch: "PCI: dwc: Add generic iATU/eDMA CSRs space detection > > method." > > - Don't fail eDMA detection procedure if the DW eDMA driver couldn't probe > > device. That happens if the driver is disabled. (@Manivannan) > > - Add "dma" registers resource mapping procedure. (@Manivannan) > > - Move the eDMA CSRs space detection into the dw_pcie_map_detect() method. > > - Remove eDMA on the dw_pcie_ep_init() internal errors. (@Manivannan) > > - Remove eDMA in the dw_pcie_ep_exit() method. > > - Move the dw_pcie_edma_detect() method execution to the tail of the > > dw_pcie_ep_init() function. > > > > Link: https://lore.kernel.org/linux-pci/20220503225104.12108-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/ > > Changelog v3: > > - Conditionally set dchan->dev->device.dma_coherent field since it can > > be missing on some platforms. (@Manivannan) > > - Drop the patch: "PCI: dwc: Add generic iATU/eDMA CSRs space detection > > method". A similar modification has been done in another patchset. > > - Add more comprehensive and less regression prune eDMA block detection > > procedure. > > - Drop the patch: "dma-direct: take dma-ranges/offsets into account in > > resource mapping". It will be separately reviewed. > > - Remove Manivannan tb tag from the modified patches. > > - Rebase onto the kernel v5.18. > > > > Link: https://lore.kernel.org/linux-pci/20220610091459.17612-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx > > Changelog v4: > > - Rabase onto the laters Frank Li series: > > Link: https://lore.kernel.org/all/20220524152159.2370739-1-Frank.Li@xxxxxxx/ > > - Add Vinod' Ab-tag. > > - Rebase onto the kernel v5.19-rcX. > > > > Link: https://lore.kernel.org/linux-pci/20220728142841.12305-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx > > Changelog v5: > > - Just resend. > > - Rebase onto the kernel v6.0-rc2. > > > > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > > Acked-By: Vinod Koul <vkoul@xxxxxxxxxx> > > Cc: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> > > Cc: Pavel Parkhomenko <Pavel.Parkhomenko@xxxxxxxxxxxxxxxxxxxx> > > Cc: "Krzysztof Wilczyński" <kw@xxxxxxxxx> > > Cc: linux-pci@xxxxxxxxxxxxxxx > > Cc: dmaengine@xxxxxxxxxxxxxxx > > Cc: linux-kernel@xxxxxxxxxxxxxxx > > > > Serge Semin (24): > > dmaengine: Fix dma_slave_config.dst_addr description > > dmaengine: dw-edma: Release requested IRQs on failure > > dmaengine: dw-edma: Convert ll/dt phys-address to PCIe bus/DMA address > > dmaengine: dw-edma: Fix missing src/dst address of the interleaved > > xfers > > dmaengine: dw-edma: Don't permit non-inc interleaved xfers > > dmaengine: dw-edma: Fix invalid interleaved xfers semantics > > dmaengine: dw-edma: Add CPU to PCIe bus address translation > > dmaengine: dw-edma: Add PCIe bus address getter to the remote EP > > glue-driver > > dmaengine: dw-edma: Drop chancnt initialization > > dmaengine: dw-edma: Fix DebugFS reg entry type > > dmaengine: dw-edma: Stop checking debugfs_create_*() return value > > dmaengine: dw-edma: Add dw_edma prefix to the DebugFS nodes descriptor > > dmaengine: dw-edma: Convert DebugFS descs to being kz-allocated > > dmaengine: dw-edma: Rename DebugFS dentry variables to 'dent' > > dmaengine: dw-edma: Simplify the DebugFS context CSRs init procedure > > dmaengine: dw-edma: Move eDMA data pointer to DebugFS node descriptor > > dmaengine: dw-edma: Join Write/Read channels into a single device > > dmaengine: dw-edma: Use DMA-engine device DebugFS subdirectory > > dmaengine: dw-edma: Use non-atomic io-64 methods > > dmaengine: dw-edma: Drop DT-region allocation > > dmaengine: dw-edma: Replace chip ID number with device name > > dmaengine: dw-edma: Bypass dma-ranges mapping for the local setup > > dmaengine: dw-edma: Skip cleanup procedure if no private data found > > PCI: dwc: Add DW eDMA engine support > > > > drivers/dma/dw-edma/dw-edma-core.c | 216 +++++----- > > drivers/dma/dw-edma/dw-edma-core.h | 10 +- > > drivers/dma/dw-edma/dw-edma-pcie.c | 24 +- > > drivers/dma/dw-edma/dw-edma-v0-core.c | 60 +-- > > drivers/dma/dw-edma/dw-edma-v0-core.h | 1 - > > drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 372 ++++++++---------- > > drivers/dma/dw-edma/dw-edma-v0-debugfs.h | 5 - > > .../pci/controller/dwc/pcie-designware-ep.c | 12 +- > > .../pci/controller/dwc/pcie-designware-host.c | 13 +- > > drivers/pci/controller/dwc/pcie-designware.c | 186 +++++++++ > > drivers/pci/controller/dwc/pcie-designware.h | 20 + > > include/linux/dma/edma.h | 18 +- > > include/linux/dmaengine.h | 2 +- > > 13 files changed, 583 insertions(+), 356 deletions(-) > > > > -- > > 2.35.1 > > > > -- > மணிவண்ணன் சதாசிவம்
