Hi, Vinod, This happens bacause I rearranged this patch without checking, it will be corrected in v2. Thanks. -----Original Message----- From: Vinod Koul [mailto:vkoul@xxxxxxxxxx] Sent: Monday, June 27, 2022 2:13 PM To: haijie <haijie1@xxxxxxxxxx> Cc: Wangzhou (B) <wangzhou1@xxxxxxxxxxxxx>; dmaengine@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx Subject: Re: [PATCH 2/8] dmaengine: hisilicon: Fix CQ head update On 25-06-22, 15:44, Jie Hai wrote: > After completion of data transfer of one or multiple descriptors, the > completion status and the current head pointer to submission queue are > written into the CQ and interrupt can be generated to inform the > software. In interrupt process CQ is read and cq_head is updated. > > hisi_dma_irq updates cq_head only when the completion status is > success. When an abnormal interrupt reports, cq_head will not update > which will cause subsequent interrupt processes read the error CQ and > never report the correct status. > > This patch updates cq_head whenever CQ is accessed. > > Fixes: e9f08b65250d ("dmaengine: hisilicon: Add Kunpeng DMA engine > support") > No need for blank line > Signed-off-by: Jie Hai <haijie1@xxxxxxxxxx> > --- > drivers/dma/hisi_dma.c | 9 ++++----- > 1 file changed, 4 insertions(+), 5 deletions(-) > > diff --git a/drivers/dma/hisi_dma.c b/drivers/dma/hisi_dma.c index > 98bc488893cc..0a0f8a4d168a 100644 > --- a/drivers/dma/hisi_dma.c > +++ b/drivers/dma/hisi_dma.c > @@ -436,12 +436,11 @@ static irqreturn_t hisi_dma_irq(int irq, void *data) > desc = chan->desc; > cqe = chan->cq + chan->cq_head; > if (desc) { > + chan->cq_head = (chan->cq_head + 1) % > + hdma_dev->chan_depth; > + hisi_dma_chan_write(q_base, HISI_DMA_Q_CQ_HEAD_PTR, q_base? -- ~Vinod
