On 27/05/2022 04:05, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@xxxxxxx> > > Convert the eDMA controller binding to DT schema. > > Signed-off-by: Peng Fan <peng.fan@xxxxxxx> > --- > > V3: > Address Krzysztof's comments, for reg/interrupts/clock-names > > V2: > Typo fix > Correct interrupts/interrupt-names/AllOf > > > .../devicetree/bindings/dma/fsl,edma.yaml | 155 ++++++++++++++++++ > .../devicetree/bindings/dma/fsl-edma.txt | 111 ------------- > arch/arm64/boot/dts/freescale/imx93.dtsi | 2 +- > 3 files changed, 156 insertions(+), 112 deletions(-) > create mode 100644 Documentation/devicetree/bindings/dma/fsl,edma.yaml > delete mode 100644 Documentation/devicetree/bindings/dma/fsl-edma.txt > > diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml > new file mode 100644 > index 000000000000..050e6cd57727 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml > @@ -0,0 +1,155 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/fsl,edma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale enhanced Direct Memory Access(eDMA) Controller > + > +description: | > + The eDMA channels have multiplex capability by programmable > + memory-mapped registers. channels are split into two groups, called > + DMAMUX0 and DMAMUX1, specific DMA request source can only be multiplexed > + by any channel of certain group, DMAMUX0 or DMAMUX1, but not both. > + > +maintainers: > + - Peng Fan <peng.fan@xxxxxxx> > + > +properties: > + compatible: > + oneOf: > + - enum: > + - fsl,vf610-edma > + - fsl,imx7ulp-edma > + - items: > + - const: fsl,ls1028a-edma > + - const: fsl,vf610-edma > + > + reg: > + minItems: 2 > + maxItems: 3 > + > + interrupts: > + minItems: 2 > + maxItems: 17 > + > + interrupt-names: > + minItems: 2 > + maxItems: 17 > + > + "#dma-cells": > + const: 2 > + > + dma-channels: > + const: 32 > + > + clocks: > + maxItems: 2 > + > + clock-names: > + maxItems: 2 > + > + big-endian: > + description: | > + If present registers and hardware scatter/gather descriptors of the > + eDMA are implemented in big endian mode, otherwise in little mode. > + type: boolean > + > +required: > + - "#dma-cells" > + - compatible > + - reg > + - interrupts > + - clocks > + - dma-channels > + > +allOf: > + - $ref: "dma-controller.yaml#" > + - if: > + properties: > + compatible: > + contains: > + const: fsl,vf610-edma > + then: > + properties: > + clock-names: > + items: > + - const: dmamux0 > + - const: dmamux1 > + interrupts: > + maxItems: 2 > + interrupt-names: > + items: > + - const: edma-tx > + - const: edma-err > + reg: > + maxItems: 3 > + > + - if: > + properties: > + compatible: > + contains: > + const: fsl,imx7ulp-edma > + then: > + properties: > + clock-names: > + items: > + - const: dma > + - const: dmamux0 > + interrupts: > + maxItems: 17 Looks good, although the information about order of interrupts is lost during conversion. The original bindings had: "total 16 channel interrupt and 1 error interrupt(located in the last)" Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
