On 10-03-22, 19:44, Andy Shevchenko wrote: > On Thu, Mar 10, 2022 at 04:57:51PM +0100, Miquel Raynal wrote: > > The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional > > dmamux register located in the system control area which can take up to > > 32 requests (16 per DMA controller). Each DMA channel can be wired to > > two different peripherals. > > > > We need two additional information from the 'dmas' property: the channel > > (bit in the dmamux register) that must be accessed and the value of the > > mux for this channel. > > > > Aside from the driver introduction, as these devices are described as > > subnodes of the system controller, we also need the system controller > > (clock) driver to populate its children manually. Starting from now on, > > one child can be the dmamux. > > In all DMA engine related patches the prefix should be "dmaengine:". Yep! -- ~Vinod
