As per Hardware manual, maximum transfer count is 2^32 − 1 bytes.
This patch fixes this issue by replacing 'U32_MAX'->'U32_MAX - 1'.
Fixes: 5000d37042a61ca55 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC")
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
drivers/dma/sh/rz-dmac.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
index 52d82f67d3dd..b35bea56e475 100644
--- a/drivers/dma/sh/rz-dmac.c
+++ b/drivers/dma/sh/rz-dmac.c
@@ -913,7 +913,7 @@ static int rz_dmac_probe(struct platform_device *pdev)
engine->device_issue_pending = rz_dmac_issue_pending;
engine->copy_align = DMAENGINE_ALIGN_1_BYTE;
- dma_set_max_seg_size(engine->dev, U32_MAX);
+ dma_set_max_seg_size(engine->dev, U32_MAX - 1);
ret = dma_async_device_register(engine);
if (ret < 0) {
--
2.17.1
