This adds the DMA engine node. Signed-off-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx> --- arch/arm/boot/dts/ox810se-wd-mbwe.dts | 4 ++++ arch/arm/boot/dts/ox810se.dtsi | 21 +++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/ox810se-wd-mbwe.dts b/arch/arm/boot/dts/ox810se-wd-mbwe.dts index 7e2fcb220aea..19e5d510e425 100644 --- a/arch/arm/boot/dts/ox810se-wd-mbwe.dts +++ b/arch/arm/boot/dts/ox810se-wd-mbwe.dts @@ -103,6 +103,10 @@ rtc0: rtc@48 { }; }; +&dma { + status = "okay"; +}; + &uart1 { status = "okay"; diff --git a/arch/arm/boot/dts/ox810se.dtsi b/arch/arm/boot/dts/ox810se.dtsi index 0755e5864c4a..79b2b49dcfbb 100644 --- a/arch/arm/boot/dts/ox810se.dtsi +++ b/arch/arm/boot/dts/ox810se.dtsi @@ -334,6 +334,27 @@ timer0: timer@200 { interrupts = <4 5>; }; }; + + dma: dma-controller@600000 { + compatible = "oxsemi,ox810se-dma"; + reg = <0x600000 0x100000>, + <0xc00000 0x100000>; + reg-names = "dma", "sgdma"; + interrupts = <13>, <14>, <15>, <16>, <20>; + clocks = <&stdclk 1>; + resets = <&reset 8>, <&reset 24>; + reset-names = "dma", "sgdma"; + + /* Encodes the authorized memory types */ + oxsemi,targets-types = + <0x45900000 0x45a00000 0>, /* SATA */ + <0x42000000 0x43000000 0>, /* SATA DATA */ + <0x48000000 0x58000000 15>, /* DDR */ + <0x58000000 0x58020000 15>; /* SRAM */ + + #dma-cells = <1>; + dma-channels = <5>; + }; }; }; }; -- 2.25.1