On 27/09/2021 17:11, Akhil R wrote:
Adding GPC DMA controller driver for Tegra186 and Tegra194. The driver
supports dma transfers between memory to memory, IO peripheral to memory
and memory to IO peripheral.
Signed-off-by: Pavan Kunapuli <pkunapuli@xxxxxxxxxx>
Signed-off-by: Rajesh Gumasta <rgumasta@xxxxxxxxxx>
Signed-off-by: Akhil R <akhilrajeev@xxxxxxxxxx>
---
drivers/dma/Kconfig | 12 +
drivers/dma/Makefile | 1 +
drivers/dma/tegra186-gpc-dma.c | 1298 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 1311 insertions(+)
create mode 100644 drivers/dma/tegra186-gpc-dma.c
...
+static int tegra_dma_terminate_all(struct dma_chan *dc)
+{
+ struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+ unsigned long wcount = 0;
+ unsigned long status;
+ unsigned long flags;
+ int err;
+
+ raw_spin_lock_irqsave(&tdc->lock, flags);
+
+ if (!tdc->dma_desc) {
+ raw_spin_unlock_irqrestore(&tdc->lock, flags);
+ return 0;
+ }
+
+ if (!tdc->busy)
+ goto skip_dma_stop;
+
+ if (tdc->tdma->chip_data->hw_support_pause)
+ err = tegra_dma_pause(tdc);
+ else
+ err = tegra_dma_stop_client(tdc);
+
+ if (err) {
+ raw_spin_unlock_irqrestore(&tdc->lock, flags);
+ return err;
+ }
+
+ status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS);
+ if (status & TEGRA_GPCDMA_STATUS_ISE_EOC) {
+ dev_dbg(tdc2dev(tdc), "%s():handling isr\n", __func__);
+ tegra_dma_xfer_complete(tdc);
+ status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS);
+ }
+
+ wcount = tdc_read(tdc, TEGRA_GPCDMA_CHAN_XFER_COUNT);
+ tegra_dma_stop(tdc);
+
+ if (tdc->dma_desc)
This is always true here right?
+ tdc->dma_desc->bytes_transferred +=
+ tdc->dma_desc->bytes_requested - (wcount * 4);
+
+skip_dma_stop:
+ tegra_dma_sid_free(tdc);
+ kfree(tdc->dma_desc);
+ vchan_free_chan_resources(&tdc->vc);
+
+ raw_spin_unlock_irqrestore(&tdc->lock, flags);
+ return 0;
+}
...
+static unsigned int get_burst_size(struct tegra_dma_channel *tdc,
+ u32 burst_size, enum dma_slave_buswidth slave_bw,
+ int len)
There are a few places like this where the alignment could be fixed.
...
> +static struct dma_async_tx_descriptor *
> +tegra_dma_prep_dma_memcpy(struct dma_chan *dc, dma_addr_t dest,
> + dma_addr_t src, size_t len, unsigned long flags)
> +{
Spacing here.
+static struct dma_async_tx_descriptor *
+tegra_dma_prep_slave_sg(struct dma_chan *dc, struct scatterlist *sgl,
+ unsigned int sg_len, enum dma_transfer_direction direction,
+ unsigned long flags, void *context)
+{
Alignment here.
Jon
--
nvpublic
