> On 08/09/2021 15:32, Akhil R wrote: > > Add DT binding document for Nvidia Tegra GPCDMA controller. > > > > Signed-off-by: Rajesh Gumasta <rgumasta@xxxxxxxxxx> > > Signed-off-by: Akhil R <akhilrajeev@xxxxxxxxxx> > > --- > > .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 106 > +++++++++++++++++++++ > > 1 file changed, 106 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > > b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > > new file mode 100644 > > index 0000000..00c5582 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.ya > > +++ ml > > @@ -0,0 +1,106 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/dma/nvidia,tegra-gpc-dma.yaml# > > tegra186-gpc-dma.yaml > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Nvidia Tegra GPC DMA Controller Device Tree Bindings > > + > > +description: | > > + Tegra GPC DMA is the Genernal Purpose Central (GPC) DMA controller > > +used for faster data > > s/Genernal/General > > I would just say > > "The Tegra General Purpose Central (GPC) DMA controller is used for ..." > > Over 80 characters. I assume that yaml files have that limitation. > > > + transfers between memory to memory, memory to device and device to > memory. > > + > > +maintainers: > > + - Jon Hunter <jonathanh@xxxxxxxxxx> > > + - Rajesh Gumasta <rgumasta@xxxxxxxxxx> > > + > > +allOf: > > + - $ref: "dma-controller.yaml#" > > + > > +properties: > > + "#dma-cells": > > + const: 1 > > + > > + compatible: > > + - enum: > > + - nvidia,tegra186-gpcdma > > + - nvidia,tegra194-gpcdma > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + minItems: 1 > > + maxItems: 32 > > You appear to have alignment issues again. > > > + > > + resets: > > + maxItems: 1 > > + > > + reset-names: > > + const: gpcdma > > + > > + iommus: > > + maxItems: 1 > > + > > + nvidia,stream-id: > > + description: | > > + stream-id corresponding to GPC DMA clients. > > + Defaults to TEGRA186_SID_GPCDMA_0 if not given > > > Why do we need this? Don't we already have the SID in the iommu property? > > Jon The value is required to be written to the register TEGRA_GPCDMA_CHAN_MCSEQ of the DMA controller (in function tegra_dma_program_sid) for the DMA to work as expected. I could not identify an api which can take the value from 'iommus' property. Regards, Akhil > > -- > nvpublic
