On 07-06-21, 15:30, Andy Shevchenko wrote: > On Mon, Jun 07, 2021 at 05:04:57PM +0530, Vinod Koul wrote: > > On 02-06-21, 11:56, Andy Shevchenko wrote: > > > + case DMA_DEV_TO_DEV: > > > + default: > > > + value |= CTL_CH_WR_NON_SNOOP_BIT | CTL_CH_RD_NON_SNOOP_BIT; > > > + value |= CTL_CH_TRANSFER_MODE_S2S; > > > + break; > > > > aha, how did you test this... > > Not sure what the question is about. You are talking about last two cases > or the entire switch? Last two weren't tested, just filed for the sake of > being documented. First two were tested with SPI host controllers. Last one is Device to device which is not supported by dmaengine and cannot be tested right now! -- ~Vinod
