Hi Everyone, I'm a kernel newbie and M.Tech student at IIT Kanpur, India. I'm researching DMA and DMAEngine for my thesis. I want to thank the community for the dmatest.c program, It has helped me very much to get an idea about using DMA api and writing a custom kernel module with it. I'm stuck with the following doubts: 1. How to find which DMAEngine controller my Linux system is using. I read about I/OAT by intel and I guess this is the one my system is using, But I can't get it from my hardware or Linux kernel. I also want to know about my DMAEngine Controller specifications, like number of channels, bandwidth, latency etc. 2. Is DMA channel a software abstraction? How is it actually related to DMA hardware? Are multiple DMA channels multiplexed to some single entity. Also, if it's software abstraction, why can I only request a maximum of 16 DMA channels on my machine? Earlier I thought using multiple DMA channels would be like using a multi-lane highway which would be very fast, but My experiments on using multiple DMA channels simultaneously actually worsen the performance (compared with single DMA channel) 3. I read Efficient Asynchronous Memory Copy Operations on Multi-Core Systems and I/OAT by K. Vaidyanathan, which helped me a lot. But still some of my above questions remain uncleared. Also, a general doubt, to what extent the DMAEngine controller is utilized? I mean I observed the DMA is used for high-speed network packet copying in servers, and various applications ( like memory devices, video devices) propose to use the DMAEngine, Do we have enough DMA resources to fulfill everyone's needs? It would be very helpful to me if you can answer some (if not all) questions. Thank You, Best Regards, Shivank Garg Final year (BT+MT) student, IIT Kanpur
