Re: [PATCH v5 09/15] dmaengine: dw-edma: Improve the linked list and data blocks definition

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Hi Gustavo,

> In the previous implementation the driver assumes that only existed 2
> memory spaces that would be equal distributed amount the write/read
> channels.

What do you think about:

  In the previous implementation the driver assumed that there existed
  only two memory spaces that would equally distribute the amount of
  read/write channels.

> This might not be the case on some other implementations, therefore this
> patches changes this requirement so that each write/read channel has
[...]

Probably "patch" here.

Krzysztof



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