On 15-05-20, 13:51, Andy Shevchenko wrote: > On Fri, May 15, 2020 at 11:39:11AM +0530, Vinod Koul wrote: > > On 12-05-20, 15:38, Andy Shevchenko wrote: > > > On Tue, May 12, 2020 at 02:49:46PM +0300, Serge Semin wrote: > > > > On Tue, May 12, 2020 at 12:08:04PM +0300, Andy Shevchenko wrote: > > > > > On Tue, May 12, 2020 at 12:35:31AM +0300, Serge Semin wrote: > > > > > > On Tue, May 12, 2020 at 12:01:38AM +0300, Andy Shevchenko wrote: > > > > > > > On Mon, May 11, 2020 at 11:05:28PM +0300, Serge Semin wrote: > > > > > > > > On Fri, May 08, 2020 at 02:12:42PM +0300, Andy Shevchenko wrote: > > > > > > > > > On Fri, May 08, 2020 at 01:53:00PM +0300, Serge Semin wrote: > > ... > > > > I leave it to Rob and Vinod. > > > It won't break our case, so, feel free with your approach. > > > > I agree the DT is about describing the hardware and looks like value of > > 1 is not allowed. If allowed it should be added.. > > It's allowed at *run time*, it's illegal in *pre-silicon stage* when > synthesizing the IP. Then it should be added .. -- ~Vinod
