On 2020/05/13 Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote: > On Tue, May 12, 2020 at 01:32:23AM +0800, Robin Gong wrote: > > There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO > > transfer to be send twice in DMA mode. Please get more information from: > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. > > > nxp.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=02%7C01%7C > yibin.g > > > ong%40nxp.com%7C4276d42955334886056508d7f70e18af%7C686ea1d3bc2b4 > c6fa92 > > > cd99c5c301635%7C0%7C1%7C637249512224944620&sdata=vh0e3BER01 > 02648t9HRe14h%2BaE9m%2BAlJ5Smd6v%2B9AhM%3D&reserved=0. The > workaround is adding new sdma ram script which works in XCH mode as PIO > inside sdma instead of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. > The issue should be exist on all legacy i.mx6/7 soc family before i.mx6ul. > > NXP fix this design issue from i.mx6ul, so newer chips including > > i.mx6ul/ 6ull/6sll do not need this workaroud anymore. All other > > i.mx6/7/8 chips still need this workaroud. This patch set add new > 'fsl,imx6ul-ecspi' > > for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need > > errata or not. > > The first two reverted patches should be the same issue, though, it > > seems 'fixed' by changing to other shp script. Hope Sean or Sascha > > could have the chance to test this patch set if could fix their issues. > > Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work > > on i.mx8mm because the event id is zero. > > It's not nice to break SPI support when the new firmware is not present and I > think we can do better. Wouldn't it be possible to fall back to PIO in this case? I'm afraid that's not easy since spi driver don't know which firmware used. Could I add some comments in commit log?
