> -----Original Message----- > From: Radhey Shyam Pandey [mailto:radheys@xxxxxxxxxx] > Sent: Tuesday, April 7, 2020 6:04 PM > To: Sebastian von Ohr <vonohr@xxxxxxxxxxx>; Vinod Koul > <vkoul@xxxxxxxxxx>; Appana Durga Kedareswara Rao > <appanad@xxxxxxxxxx>; Michal Simek <michals@xxxxxxxxxx> > Cc: dmaengine@xxxxxxxxxxxxxxx > Subject: RE: [PATCH] dmaengine: xilinx_dma: Add missing check for empty > list > > Thanks for reminding me. Somehow I missed it. You mentioned in one > of earlier thread that this bug is introduced it using dma_sync_wait to > wait for DMA completion. So to reproduce the issue in xilinx axidma > test client I have to replace issue_pending with sync_wait API? Yes, dma_sync_wait triggered the bug for me almost every transfer. In the xilinx axidmatest this is probably best achieved by adding dma_sync_wait before the wait_for_completion_timeout. I encountered the bug with your xilinx-v2019.2.01 tag. On this tag it actually crashes the kernel with an invalid memory access (because the residue is written to desc). With the current driver version it probably seems to work fine. You might have to add some debug print to verify that the active_list can indeed be empty in xilinx_dma_tx_status.
