On Tue, Mar 10, 2020 at 07:31:56PM +0800, Robin Gong wrote: > ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and > i.mx8m/8mm still need this errata. Please refer to nxp official > errata document from https://www.nxp.com/ . > > For removing workaround on those chips. Add new i.mx6ul type. > > Signed-off-by: Robin Gong <yibin.gong@xxxxxxx> > Acked-by: Mark Brown <broonie@xxxxxxxxxx> > --- > drivers/spi/spi-imx.c | 50 +++++++++++++++++++++++++++++++++++++++++++++----- > 1 file changed, 45 insertions(+), 5 deletions(-) > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c > index 842a86e..f7ee2ec 100644 > --- a/drivers/spi/spi-imx.c > +++ b/drivers/spi/spi-imx.c > @@ -57,6 +57,7 @@ enum spi_imx_devtype { > IMX35_CSPI, /* CSPI on all i.mx except above */ > IMX51_ECSPI, /* ECSPI on i.mx51 */ > IMX53_ECSPI, /* ECSPI on i.mx53 and later */ > + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ > }; > > struct spi_imx_data; > @@ -75,6 +76,11 @@ struct spi_imx_devtype_data { > bool has_slavemode; > unsigned int fifo_size; > bool dynamic_burst; > + /* > + * ERR009165 fixed or not: > + * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf > + */ > + bool tx_glitch_fixed; > enum spi_imx_devtype devtype; > }; > > @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct spi_imx_data *d) > > static inline int is_imx51_ecspi(struct spi_imx_data *d) > { > - return d->devtype_data->devtype == IMX51_ECSPI; > + return d->devtype_data->devtype == IMX51_ECSPI || > + d->devtype_data->devtype == IMX6UL_ECSPI; > } Erm, no. A i.MX51 ECSPI is a i.MX51 ECSPI and not a i.MX6UL ECSPI. If you want to handle them equally somewhere then explicitly test for i.MX6ul *and* i.MX51 there. > > static inline int is_imx53_ecspi(struct spi_imx_data *d) > @@ -585,9 +592,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, > ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); > spi_imx->spi_bus_clk = clk; > > - /* ERR009165: work in XHC mode as PIO */ > - if (spi_imx->usedma) > - ctrl &= ~MX51_ECSPI_CTRL_SMC; > + /* > + * ERR009165: work in XHC mode instead of SMC as PIO on the chips > + * before i.mx6ul. > + */ > + if (spi_imx->usedma) { > + if (spi_imx->devtype_data->tx_glitch_fixed) > + ctrl |= MX51_ECSPI_CTRL_SMC; > + else > + ctrl &= ~MX51_ECSPI_CTRL_SMC; > + } Changed again, but the PIO case still not honoured. This should look like if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed) ctrl |= MX51_ECSPI_CTRL_SMC; else ctrl &= ~MX51_ECSPI_CTRL_SMC; > > writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); > > @@ -615,6 +629,8 @@ static void mx51_setup_wml(struct spi_imx_data *spi_imx) > { > u32 tx_wml = 0; > > + if (spi_imx->devtype_data->tx_glitch_fixed) > + tx_wml = spi_imx->wml; That explains the variable introduced in the last patch, ok. I have the impression that splitting up 06/13 and 07/13 into two patches doesn't make it easier to review. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
