On 29-01-20, 13:15, Radhey Shyam Pandey wrote: > Reset DMA channel after stop to ensure that pending transfers and FIFOs > in the datapath are flushed or completed. It also cleanup the terminate > path and removes stop for the cyclic mode as after the reset stop is not > required. This fixes intermittent data verification failure when xilinx > dma test the client is stressed and loaded/unloaded multiple times. Applied, thanks -- ~Vinod
