On Tue, 22 Oct 2019 22:30:19 +0530, Radhey Shyam Pandey wrote: > Add devicetree binding for Xilinx AXI Multichannel Direct Memory Access > (AXI MCDMA) IP. The AXI MCDMA provides high-bandwidth direct memory > access between memory and AXI4-Stream target peripherals. The AXI MCDMA > core provides a scatter-gather interface with multiple channel support > with independent configuration. > > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxxxxx> > --- > Keep compatible string one per line. Suggested by Rob. > Reuse the existing xlnx,axi-dma-* channel names. Suggested by Rob. > --- > .../devicetree/bindings/dma/xilinx/xilinx_dma.txt | 15 +++++++++++---- > 1 file changed, 11 insertions(+), 4 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
