On 19-08-19, 16:56, Jon Hunter wrote: > >>>>>>> On this, I am inclined to think that dma driver should not be involved. > >>>>>>> The ADMAIF needs this configuration and we should take the path of > >>>>>>> dma_router for this piece and add features like this to it > >>>>>> > >>>>>> Hi Vinod, > >>>>>> > >>>>>> The configuration is needed by both ADMA and ADMAIF. The size is > >>>>>> configurable > >>>>>> on ADMAIF side. ADMA needs to know this info and program accordingly. > >>>>> > >>>>> Well I would say client decides the settings for both DMA, DMAIF and > >>>>> sets the peripheral accordingly as well, so client communicates the two > >>>>> sets of info to two set of drivers > >>>> > >>>> That maybe, but I still don't see how the information is passed from the > >>>> client in the first place. The current problem is that there is no means > >>>> to pass both a max-burst size and fifo-size to the DMA driver from the > >>>> client. > >>> > >>> So one thing not clear to me is why ADMA needs fifo-size, I thought it > >>> was to program ADMAIF and if we have client programme the max-burst > >>> size to ADMA and fifo-size to ADMAIF we wont need that. Can you please > >>> confirm if my assumption is valid? > >> > >> Let me see if I can clarify ... > >> > >> 1. The FIFO we are discussing here resides in the ADMAIF module which is > >> a separate hardware block the ADMA (although the naming make this > >> unclear). > >> > >> 2. The size of FIFO in the ADMAIF is configurable and it this is > >> configured via the ADMAIF registers. This allows different channels > >> to use different FIFO sizes. Think of this as a shared memory that is > >> divided into n FIFOs shared between all channels. > >> > >> 3. The ADMA, not the ADMAIF, manages the flow to the FIFO and this is > >> because the ADMAIF only tells the ADMA when a word has been > >> read/written (depending on direction), the ADMAIF does not indicate > >> if the FIFO is full, empty, etc. Hence, the ADMA needs to know the > >> total FIFO size. > >> > >> So the ADMA needs to know the FIFO size so that it does not overrun the > >> FIFO and we can also set a burst size (less than the total FIFO size) > >> indicating how many words to transfer at a time. Hence, the two parameters. > > > > Thanks, I confirm this is my understanding as well. > > > > To compare to regular case for example SPI on DMA, SPI driver will > > calculate fifo size & burst to be used and program dma (burst size) and > > its own fifos accordingly > > > > So, in your case why should the peripheral driver not calculate the fifo > > size for both ADMA and ADMAIF and (if required it's own FIFO) and > > program the two (ADMA and ADMAIF). > > > > What is the limiting factor in this flow is not clear to me. > > The FIFO size that is configured by the ADMAIF driver needs to be given > to the ADMA driver so that it can program its registers accordingly. The > difference here is that both the ADMA and ADMAIF need the FIFO size. Can you please help describing what it is programming using the FIFO size of ADMAIF? Thanks -- ~Vinod
