On Tue, Jul 9, 2019 at 10:12 PM Jassi Brar <jassisinghbrar@xxxxxxxxx> wrote: > > On Tue, Jul 9, 2019 at 9:34 AM Rob Herring <robh@xxxxxxxxxx> wrote: > > > > On Wed, Jun 12, 2019 at 07:52:37PM -0500, jassisinghbrar@xxxxxxxxx wrote: > > > From: Jassi Brar <jaswinder.singh@xxxxxxxxxx> > > > > > > Document the devicetree bindings for Socionext Milbeaut HDMAC > > > controller. Controller has upto 8 floating channels, that need > > > a predefined slave-id to work from a set of slaves. > > > > > > Signed-off-by: Jassi Brar <jaswinder.singh@xxxxxxxxxx> > > > --- > > > .../bindings/dma/milbeaut-m10v-hdmac.txt | 54 +++++++++++++++++++ > > > 1 file changed, 54 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt > > > > > > diff --git a/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt > > > new file mode 100644 > > > index 000000000000..a104fcb9e73d > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt > > > @@ -0,0 +1,51 @@ > > > +* Milbeaut AHB DMA Controller > > > + > > > +Milbeaut AHB DMA controller has transfer capability bellow. > > > + - memory to memory transfer > > > + - device to memory transfer > > > + - memory to device transfer > > > + > > > +Required property: > > > +- compatible: Should be "socionext,milbeaut-m10v-hdmac" > > > +- reg: Should contain DMA registers location and length. > > > +- interrupts: Should contain all of the per-channel DMA interrupts. > > > > How many? > > > Each channel has an IRQ line. And the number of channels is > configurable. So instead of having some explicit property like > 'dma-channels', we infer that from the number of irqs registered. Yes, I get that. There's still a range that's valid and you need to define those constraints. If there's a variable number of channels, then that implies different SoCs which should also mean different compatible strings. Rob
