On 21-05-19, 14:23, Alexandru Ardelean wrote:
> From: Lars-Peter Clausen <lars@xxxxxxxxxx>
>
> Starting with version 4.1.a the AXI-DMAC is capable of reporting the
> required length alignment.
>
> The LSBs that are required to be set for alignment will always read back as
> set from the transfer length register. It is not possible to clear them by
> writing a 0. This means the driver can discover the length alignment
> requirement by writing 0 to that register and reading back the value.
>
> Since the DMA will support length alignment requirements that are different
> from the address alignment requirement track both of them independently.
>
> For older versions of the peripheral assume that the length alignment
> requirement is equal to the address alignment requirement.
>
> Signed-off-by: Lars-Peter Clausen <lars@xxxxxxxxxx>
You need to sign off the patch before sending. Please reread Documentation/process/submitting-patches.rst
> axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, AXI_DMAC_FLAG_CYCLIC);
> if (axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS) == AXI_DMAC_FLAG_CYCLIC)
> @@ -670,6 +676,13 @@ static int axi_dmac_detect_caps(struct axi_dmac *dmac)
> return -ENODEV;
> }
>
> + if ((version & 0xff00) >= 0x0100) {
magic numbers yaay
--
~Vinod
