26.04.2019 15:01, Vinod Koul пишет: > On 25-04-19, 02:17, Dmitry Osipenko wrote: >> The readl/writel functions are inserting memory barrier in order to >> ensure that memory stores are completed. On Tegra20 and Tegra30 this >> results in L2 cache syncing which isn't a cheapest operation. The >> tegra20-apb-dma driver doesn't need to synchronize generic memory >> accesses, hence use the relaxed versions of the functions. > > Subsystem name is **dmaengine** not dma! Please fix that > Looks like you answered to a wrong email.
