RE: [PATCH v2 dmaengine 1/1] dmaengine: imx-sdma: revert: add clock ratio 1:1 check

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From: Angus Ainslie <angus@xxxxxxxx> Sent: Friday, March 22, 2019 9:20 PM
> Hi Lucas,
> 
> On 2019-03-21 20:36, Andy Duan wrote:
> > This reverts commit 25aaa75df1e6 (dmaengine: imx-sdma: add clock ratio
> > 1:1 check) due to break SDMA function on i.MX6SX platform.
> >
> > Log:
> > imx-sdma 20ec000.sdma: Timeout waiting for CH0 ready
> >
> > Fixes: 25aaa75df1e6 (dmaengine: imx-sdma: add clock ratio 1:1 check)
> > Signed-off-by: Fugang Duan <fugang.duan@xxxxxxx>
> > ---
> >  drivers/dma/imx-sdma.c | 18 ++++--------------
> >  1 file changed, 4 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index
> > 5f3c137..7fae4bf 100644
> > --- a/drivers/dma/imx-sdma.c
> > +++ b/drivers/dma/imx-sdma.c
> > @@ -441,8 +441,6 @@ struct sdma_engine {
> >  	unsigned int			irq;
> >  	dma_addr_t			bd0_phys;
> >  	struct sdma_buffer_descriptor	*bd0;
> > -	/* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/
> > -	bool				clk_ratio;
> >  };
> >
> >  static int sdma_config_write(struct dma_chan *chan, @@ -665,11 +663,8
> > @@ static int sdma_run_channel0(struct sdma_engine
> > *sdma)
> >  		dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
> >
> >  	/* Set bits of CONFIG register with dynamic context switching */
> > -	reg = readl(sdma->regs + SDMA_H_CONFIG);
> > -	if ((reg & SDMA_H_CONFIG_CSM) == 0) {
> > -		reg |= SDMA_H_CONFIG_CSM;
> > -		writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG);
> > -	}
> > +	if (readl(sdma->regs + SDMA_H_CONFIG) == 0)
> > +		writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs +
> SDMA_H_CONFIG);
> >
> >  	return ret;
> >  }
> > @@ -1852,9 +1847,6 @@ static int sdma_init(struct sdma_engine *sdma)
> >  	if (ret)
> >  		goto disable_clk_ipg;
> >
> > -	if (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg))
> > -		sdma->clk_ratio = 1;
> > -
> >  	/* Be sure SDMA has not started yet */
> >  	writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
> >
> > @@ -1895,10 +1887,8 @@ static int sdma_init(struct sdma_engine *sdma)
> >  	writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);
> >
> >  	/* Set bits of CONFIG register but with static context switching */
> > -	if (sdma->clk_ratio)
> > -		writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs +
> SDMA_H_CONFIG);
> > -	else
> > -		writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
> > +	/* FIXME: Check whether to set ACR bit depending on clock ratios */
> > +	writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
> 
> It looks like the automated check breaks some imx chips. Are you ok if I
> resubmit with the original devicetree switch ?
> 
> I guess another way would be to have a different compatible string and have
> some kind of "quirks".
> 
> Thanks
> Angus

Since current SDMA driver break imx legacy platforms,  please apply the patch firstly.

Then we can submit the correct patch for clock ratio 1:1 check.

Andy

> 
> >
> >  	writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);





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