On Fri, Nov 30, 2018 at 10:36:42PM +0200, Andy Shevchenko wrote:
> Intel Merrifield has a reduced size of FIFO used in iDMA 32-bit controller,
> i.e. 512 bytes instead of 1024.
>
> Fix this by partitioning it as 64 bytes per channel.
>
> Note, in the future we might switch to 'fifo-size' property instead of
> hard coded value.
v2 of the series is coming soon this week, so, don't consider this one.
>
> Fixes: 199244d69458 ("dmaengine: dw: add support of iDMA 32-bit hardware")
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx
> ---
> drivers/dma/dw/core.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
> index d0c3e50b39fb..e85b078fc207 100644
> --- a/drivers/dma/dw/core.c
> +++ b/drivers/dma/dw/core.c
> @@ -1059,12 +1059,12 @@ static void dwc_issue_pending(struct dma_chan *chan)
> /*
> * Program FIFO size of channels.
> *
> - * By default full FIFO (1024 bytes) is assigned to channel 0. Here we
> + * By default full FIFO (512 bytes) is assigned to channel 0. Here we
> * slice FIFO on equal parts between channels.
> */
> static void idma32_fifo_partition(struct dw_dma *dw)
> {
> - u64 value = IDMA32C_FP_PSIZE_CH0(128) | IDMA32C_FP_PSIZE_CH1(128) |
> + u64 value = IDMA32C_FP_PSIZE_CH0(64) | IDMA32C_FP_PSIZE_CH1(64) |
> IDMA32C_FP_UPDATE;
> u64 fifo_partition = 0;
>
> --
> 2.19.2
>
--
With Best Regards,
Andy Shevchenko
