On Mon, Aug 27, 2018 at 7:31 AM Vinod <vkoul@xxxxxxxxxx> wrote:
>
> On 02-08-18, 16:10, Andrea Merello wrote:
> > The width of the "length register" cannot be autodetected, and it is now
> > specified with a DT property. Add DOC for it.
>
> Add Documentation for it...
OK
> >
> > Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> > Cc: Mark Rutland <mark.rutland@xxxxxxx>
> > Cc: devicetree@xxxxxxxxxxxxxxx
> > Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxxxxx>
> > Signed-off-by: Andrea Merello <andrea.merello@xxxxxxxxx>
> > Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxxxxx>
> > ---
> > Changes in v2:
> > - change property name
> > - property is now optional
> > - cc DT maintainer
> > Changes in v3:
> > - reword
> > - cc DT maintainerS and ML
> > Changes in v4:
> > - specify the unit, the valid range and the default value
> > ---
> > Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> > index a2b8bfaec43c..aec4a41a03ae 100644
> > --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> > +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
> > @@ -41,6 +41,10 @@ Optional properties:
> > - xlnx,include-sg: Tells configured for Scatter-mode in
> > the hardware.
> > Optional properties for AXI DMA:
> > +- xlnx,sg-length-width: Should be set to the width in bits of the length
> > + register as configured in h/w. Takes values {8...26}. If the property
> > + is missing or invalid then the default value 23 is used. This is the
> > + maximum value that is supported by all IP versions.
> > - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
> > Optional properties for VDMA:
> > - xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
> > --
> > 2.17.1
>
> --
> ~Vinod
