On 06-07-18, 11:05, Guodong Xu wrote: > On Thu, Jun 28, 2018 at 2:02 PM Vinod <vkoul@xxxxxxxxxx> wrote: > > > > On 22-06-18, 11:24, Guodong Xu wrote: > > > From: Li Yu <liyu65@xxxxxxxxxxxxx> > > > > > > On k3 series of SoC, DMA controller reserves some channels for > > > other on-chip coprocessors. By adding support to dma_min_chan, kernel > > > will not be able to use these reserved channels. > > > > > > One example is on Hi3660 platform, channel 0 is reserved to lpm3. > > > > > > Please also refer to Documentation/devicetree/bindings/dma/k3dma.txt > > > > and if some other platform has channel X marked for co-processor, maybe > > a last channel or something in middle, how will this work then? > > > Hi， Vinod > > Sorry for delayed response. We checked with Kirin hardware design > team, so far their design strategy is all Kirin SoC series reserve > only from minimum side, saying channel 0, then 1, then 2. That impacts > the current SoC in upstreaming, Kirin960 (Hi3660), and next versions > in Kirin SoC, Kirin970 and 980, which may hit upstream later. And what guarantees that they will not change their mind.. > > I am thinking this should be a mask, rather than min. > > > > So, since this driver k3dma.c is only used by Kirin SoC DMA > controllers, I would prefer to keep the current design dma_min_chan > unchanged. > > What do you think? I would still prefer bitmask to expose the channels you are supposed to use -- ~Vinod -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
