[PATCH 0/2] DMA driver for Xilinx Video Framebuffer Read/Write IP

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This patch series adds a driver which controls the production verison V2
of Xilinx Video Framebuffer Read and Xilinx Video Framebuffer Write
Soft IP DMAs. These IPs are single channel DMA engines.
They are video format aware though. Based on the video format selected,
the memory layout of the video data will be selected as packed or semi-planar.
For e.g. if NV12 format is enabled and selected, the luma and chroma data
can be stored in different buffers (semi-planar).
The driver also exposes APIs which clients may use to enlist the supported
video formats.

Vishal Sagar (2):
  dt-bindings: dmaengine: Add Xilinx Video Framebuffer IP
  dma: xilinx: Add driver for Video Framebuffer IP

 .../bindings/dma/xilinx/xilinx_frmbuf.txt          |   76 ++
 drivers/dma/Kconfig                                |   14 +-
 drivers/dma/xilinx/Makefile                        |    1 +
 drivers/dma/xilinx/xilinx_frmbuf.c                 | 1155 ++++++++++++++++++++
 include/linux/dma/xilinx_frmbuf.h                  |   97 ++
 5 files changed, 1342 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/dma/xilinx/xilinx_frmbuf.txt
 create mode 100644 drivers/dma/xilinx/xilinx_frmbuf.c
 create mode 100644 include/linux/dma/xilinx_frmbuf.h

--
1.9.1

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