On 27.09.2017 16:46, Jon Hunter wrote: > > On 27/09/17 14:44, Jon Hunter wrote: >> >> On 27/09/17 13:12, Dmitry Osipenko wrote: >>> On 27.09.2017 11:34, Jon Hunter wrote: >>>> >>>> On 27/09/17 02:57, Dmitry Osipenko wrote: >>>>> On 26.09.2017 17:50, Jon Hunter wrote: >>>>>> >>>>>> On 26/09/17 00:22, Dmitry Osipenko wrote: >>>>>>> Document DT bindings for NVIDIA Tegra AHB DMA controller that presents >>>>>>> on Tegra20/30 SoC's. >>>>>>> >>>>>>> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx> >>>>>>> --- >>>>>>> .../bindings/dma/nvidia,tegra20-ahbdma.txt | 23 ++++++++++++++++++++++ >>>>>>> 1 file changed, 23 insertions(+) >>>>>>> create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt >>>>>>> >>>>>>> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt >>>>>>> new file mode 100644 >>>>>>> index 000000000000..2af9aa76ae11 >>>>>>> --- /dev/null >>>>>>> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt >>>>>>> @@ -0,0 +1,23 @@ >>>>>>> +* NVIDIA Tegra AHB DMA controller >>>>>>> + >>>>>>> +Required properties: >>>>>>> +- compatible: Must be "nvidia,tegra20-ahbdma" >>>>>>> +- reg: Should contain registers base address and length. >>>>>>> +- interrupts: Should contain one entry, DMA controller interrupt. >>>>>>> +- clocks: Should contain one entry, DMA controller clock. >>>>>>> +- resets : Should contain one entry, DMA controller reset. >>>>>>> +- #dma-cells: Should be <1>. The cell represents DMA request select value >>>>>>> + for the peripheral. For more details consult the Tegra TRM's >>>>>>> + documentation, in particular AHB DMA channel control register >>>>>>> + REQ_SEL field. >>>>>> >>>>>> What about the TRIG_SEL field? Do we need to handle this here as well? >>>>>> >>>>> >>>>> Actually, DMA transfer trigger isn't related a hardware description. It's up to >>>>> software to decide what trigger to select. So it shouldn't be in the binding. >>>> >>>> I think it could be, if say a board wanted a GPIO to trigger a transfer. >>>> >>> >>> GPIO isn't a very good example, there is no "GPIO" trigger. To me all triggers >>> are software-defined, so that software could create transfer chains. >> >> TRM shows the following in the APBDMA_TRIG_REG_0 ... >> >> "XRQ_A: XRQ.A (GPIOA) (Hardware initiated DMA request)" > > Furthermore there are timer and hw-semaphore triggers as well. > Aha, I wasn't sure about what XRQ is. AHB DMA doesn't have XRQ.A as a trigger, but XRQ.C/D which I suppose corresponds to GPIO C/D. Timer and hw-semaphore are more questionable, aren't semaphores software-only triggerable? -- Dmitry -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
