On Sun, Sep 17, 2017 at 05:19:48AM +0200, Stefan Brüns wrote: > For the H3, the burst lengths field offsets in the channel configuration > register differs from earlier SoC generations. > > Using the A31 register macros actually configured the H3 controller > do to bursts of length 1 always, which although working leads to higher > bus utilisation. > > Signed-off-by: Stefan Brüns <stefan.bruens@xxxxxxxxxxxxxx> Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx> Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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