On 2017-06-26 18:19, Abhishek Sahu wrote:
Some of the DMA controllers are capable of issuing the commands
to peripheral by the DMA. These commands can be list of register
reads/writes and its different from normal data reads/writes.
This patch adds new flag DMA_PREP_CMD in DMA API which tells
the driver that the data passed to DMA API is in command format
and DMA driver will form descriptor in the required format.
This flag can be used by any DMA controller driver which requires
special handling for non-Data descriptors.
Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx>
---
include/linux/dmaengine.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 5336808..bbc297e 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -186,6 +186,8 @@ struct dma_interleaved_template {
* on the result of this operation
* @DMA_CTRL_REUSE: client can reuse the descriptor and submit again
till
* cleared or freed
+ * @DMA_PREP_CMD: tell the driver that the data passed to DMA API is
in command
+ * format and it will be used for configuring the peripheral
registers.
*/
enum dma_ctrl_flags {
DMA_PREP_INTERRUPT = (1 << 0),
@@ -195,6 +197,7 @@ enum dma_ctrl_flags {
DMA_PREP_CONTINUE = (1 << 4),
DMA_PREP_FENCE = (1 << 5),
DMA_CTRL_REUSE = (1 << 6),
+ DMA_PREP_CMD = (1 << 7),
Hi Vinod/Dan,
Could you please help in reviewing these DMA patches.
I have posted QPIC NAND support patches which are dependent
upon these DMA patches.
https://www.spinics.net/lists/kernel/msg2545386.html
};
/**
--
Abhishek Sahu
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