Re: [PATCH v2] dmaengine: Add driver for Altera / Intel mSGDMA IP core

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On 04.07.2017 05:48, Vinod Koul wrote:
On Mon, Jul 03, 2017 at 07:57:41AM +0200, Stefan Roese wrote:
Okay, will use GENMASK() for this in v3.

+/* mSGDMA response register bit definitions */
+#define MSGDMA_RESP_EARLY_TERM	BIT(8)
+#define MSGDMA_RESP_ERR_MASK	0xFF

TABS or Spaces please, not both

while reading, it looked that one was a space. If it is TABS if I am fine
with that
+static irqreturn_t msgdma_irq_handler(int irq, void *data)
+{
+	struct msgdma_device *mdev = data;
+	u32 status;
+
+	status = ioread32(&mdev->csr->status);
+	if ((status & MSGDMA_CSR_STAT_BUSY) == 0)
+		mdev->idle = true;
+
+	tasklet_schedule(&mdev->irq_tasklet);
+
+	/* Clear interrupt in mSGDMA controller */
+	iowrite32(MSGDMA_CSR_STAT_IRQ, &mdev->csr->status);
+
+	return IRQ_HANDLED;

are we not going to submit here :(

I wanted to defer as much a possible into the tasklet. If you think its
better to submit directly in the interrupt handler, then I can change
the handler to submit potentially new descriptors directly.

Oh okay that's fine though, I was under the impression that you will update
this, as I said it is not a deal breaker but performance of your driver will
be less in current case.

I'll move the idle-submission into the handler in v3.

Thanks,
Stefan
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