On Tue, Feb 7, 2017 at 1:57 PM, Dan Williams <dan.j.williams@xxxxxxxxx> wrote: > On Tue, Feb 7, 2017 at 12:16 AM, Anup Patel <anup.patel@xxxxxxxxxxxx> wrote: >> The DMAENGINE framework assumes that if PQ offload is supported by a >> DMA device then all 256 PQ coefficients are supported. This assumption >> does not hold anymore because we now have BCM-SBA-RAID offload engine >> which supports PQ offload with limited number of PQ coefficients. >> >> This patch extends async_tx APIs to handle DMA devices with support >> for fewer PQ coefficients. >> >> Signed-off-by: Anup Patel <anup.patel@xxxxxxxxxxxx> >> Reviewed-by: Scott Branden <scott.branden@xxxxxxxxxxxx> > > I don't like this approach. Define an interface for md to query the > offload engine once at the beginning of time. We should not be adding > any new extensions to async_tx. Even if we do capability checks in Linux MD, we still need a way for DMAENGINE drivers to advertise number of PQ coefficients handled by the HW. I agree capability checks should be done once in Linux MD but I don't see why this has to be part of BCM-SBA-RAID driver patches. We need separate patchsets to address limitations of async_tx framework. Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
