[PATCH] dmaengine: ipu: Revert ipu_irq_handler changes.

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From: Ivan Stoyanov <ivan.stoyanov@xxxxxxxxxxxxx>

In commit 3d8cc00073d6750ffe883685e49b2e4a0f596370 are consolidate functions ipu_irq_err and ipu_irq_fn considered for duplicated.
Since this patch ipu driver does not work properly and cause kernel freeze during booting.

[    1.018314] Remapped [mem 0x53fc00b4-0x53fc01bf] at f57c00b4
[    1.024010] dmaengine: private_candidate: dma0chan0 filter said false
[    1.030591] dmaengine: private_candidate: dma0chan1 filter said false
[    1.037044] dmaengine: private_candidate: dma0chan2 filter said false
[    1.043643] dmaengine: private_candidate: dma0chan3 filter said false
[    1.050096] dmaengine: private_candidate: dma0chan4 filter said false
[    1.056692] dmaengine: private_candidate: dma0chan5 filter said false
[    1.063146] dmaengine: private_candidate: dma0chan6 filter said false
[    1.069742] dmaengine: private_candidate: dma0chan7 filter said false
[    1.076233] dmaengine: private_candidate: dma0chan8 filter said false
[    1.082843] dmaengine: private_candidate: dma0chan9 filter said false
[    1.089296] dmaengine: private_candidate: dma0chan10 filter said false
[    1.095894] dmaengine: private_candidate: dma0chan11 filter said false
[    1.102491] dmaengine: private_candidate: dma0chan12 filter said false
[    1.109102] dmaengine: private_candidate: dma0chan13 filter said false
[    1.115718] IPU: mapped source 14 to IRQ 176
[    1.198869] ipu-core ipu-core: init channel = 14
[    1.203638] ipu-core ipu-core: IDMAC_CONF 0x70, IC_CONF 0x0, IDMAC_CHA_EN 0x0, IDMAC_CHA_PRI 0x4000, IDMAC_ CHA_BUSY 0x0
[    1.214447] ipu-core ipu-core: BUF0_RDY 0x4000, BUF1_RDY 0x0, CUR_BUF 0x0, DB_MODE 0x0, TASKS_STAT 0x2003
[    1.224442] dma dma0chan14: Found channel 0xe, irq 176
[    1.229690] dmaengine: __dma_request_channel: success (dma0chan14)
[    1.235966] return 1
[    1.238276] mx3_sdc_fb mx3_sdc_fb: mx3fb_check_var
[    1.243121] mx3_sdc_fb mx3_sdc_fb: mx3fb_check_var
[    1.247989] mx3_sdc_fb mx3_sdc_fb: sdc_set_brightness: value = 255
[    1.254238] mx3_sdc_fb mx3_sdc_fb: disabling irq 176
[    1.270275] mx3_sdc_fb mx3_sdc_fb: allocated fb @ p=0x97000000, v=0xd887d000, size=1536000.
[    1.294524] mx3_sdc_fb mx3_sdc_fb: pixclock = 33260000l Hz
[    1.300118] mx3_sdc_fb mx3_sdc_fb: panel size = 800 x 480
[    1.305528]  hor_conf 3e80000, ver_conf 1f40001
[    1.310266] mx3_sdc_fb mx3_sdc_fb: InitPanel() - Pixel clock divider less than 4
[    1.317813] mx3_sdc_fb mx3_sdc_fb: pixel clk = 33260000, divider 4.0
[    1.324272] mx3_sdc_fb mx3_sdc_fb: DI_DISP_IF_CONF = 0x04000000
[    1.330209] mx3_sdc_fb mx3_sdc_fb: DI_DISP_SIG_POL = 0x06000000
[    1.336287] mx3_sdc_fb mx3_sdc_fb: DI_DISP3_TIME_CONF = 0x01C00040
[    1.348164] mx3_sdc_fb mx3_sdc_fb: mx3fbi d798d25c, txd = NULL
[    1.354123] ipu-core ipu-core: write param mem - addr = 0x000100E0, data = 0x00000000
[    1.362003] ipu-core ipu-core: write param mem - addr = 0x000100E1, data = 0x00004000
[    1.369987] ipu-core ipu-core: write param mem - addr = 0x000100E2, data = 0x00000000
[    1.377835] ipu-core ipu-core: write param mem - addr = 0x000100E3, data = 0xDF31F000
[    1.385821] ipu-core ipu-core: write param mem - addr = 0x000100E4, data = 0x00000001
[    1.393670] ipu-core ipu-core: write param mem - addr = 0x000100E8, data = 0x97000000
[    1.401655] ipu-core ipu-core: write param mem - addr = 0x000100E9, data = 0x00000000
[    1.409504] ipu-core ipu-core: write param mem - addr = 0x000100EA, data = 0x1E0831FA
[    1.417490] ipu-core ipu-core: write param mem - addr = 0x000100EB, data = 0x96416502
[    1.425338] ipu-core ipu-core: write param mem - addr = 0x000100EC, data = 0x00000000
[    1.433323] dma dma0chan14: Submitting sg d798d2d4
[    1.438224] dma dma0chan14: Updated sg d798d2d4 on channel 0xe buffer 0
[    1.444864] ipu-core ipu-core: IDMAC_CONF 0x70, IC_CONF 0x0, IDMAC_CHA_EN 0x0, IDMAC_CHA_PRI 0x4000, IDMAC_ CHA_BUSY 0x0
[    1.455798] ipu-core ipu-core: BUF0_RDY 0x4000, BUF1_RDY 0x0, CUR_BUF 0x0, DB_MODE 0x0, TASKS_STAT 0x3
[    1.465214] ipu-core ipu-core: IDMAC_CONF 0x70, IC_CONF 0x0, IDMAC_CHA_EN 0x4000, IDMAC_CHA_PRI 0x4000, IDM AC_CHA_BUSY 0x0
[    1.476365] ipu-core ipu-core: BUF0_RDY 0x4000, BUF1_RDY 0x0, CUR_BUF 0x0, DB_MODE 0x0, TASKS_STAT 0x3
[    1.485807] mx3_sdc_fb mx3_sdc_fb: 422: Submit d887b09c #2 [+]
[    1.510871] mx3_sdc_fb mx3_sdc_fb: sdc_set_brightness: value = 255
[

Signed-off-by: Ivan Stoyanov <ivan.stoyanov@xxxxxxxxxxxxx>
---
 drivers/dma/ipu/ipu_irq.c | 46 ++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 42 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/ipu/ipu_irq.c b/drivers/dma/ipu/ipu_irq.c
index dd184b5..3f9477c 100644
--- a/drivers/dma/ipu/ipu_irq.c
+++ b/drivers/dma/ipu/ipu_irq.c
@@ -265,8 +265,8 @@ int ipu_irq_unmap(unsigned int source)
 	return ret;
 }
 
-/* Chained IRQ handler for IPU function and error interrupt */
-static void ipu_irq_handler(struct irq_desc *desc)
+/* Chained IRQ handler for IPU error interrupt */
+static void ipu_irq_err(struct irq_desc *desc)
 {
 	struct ipu *ipu = irq_desc_get_handler_data(desc);
 	u32 status;
@@ -306,6 +306,44 @@ static void ipu_irq_handler(struct irq_desc *desc)
 	}
 }
 
+/* Chained IRQ handler for IPU function interrupt */
+static void ipu_irq_fn(struct irq_desc *desc)
+{
+	struct ipu *ipu = irq_desc_get_handler_data(desc);
+	u32 status;
+	int i, line;
+
+	for (i = 0; i < IPU_IRQ_NR_FN_BANKS; i++) {
+		struct ipu_irq_bank *bank = irq_bank + i;
+
+		raw_spin_lock(&bank_lock);
+		status = ipu_read_reg(ipu, bank->status);
+		/* Not clearing all interrupts, see above */
+		status &= ipu_read_reg(ipu, bank->control);
+		raw_spin_unlock(&bank_lock);
+		while ((line = ffs(status))) {
+			struct ipu_irq_map *map;
+			unsigned int irq;
+
+			line--;
+			status &= ~(1UL << line);
+
+			raw_spin_lock(&bank_lock);
+			map = src2map(32 * i + line);
+			if (map)
+				irq = map->irq;
+			raw_spin_unlock(&bank_lock);
+
+			if (!map) {
+				pr_err("IPU: Interrupt on unmapped source %u bank %d\n",
+				       line, i);
+				continue;
+			}
+			generic_handle_irq(irq);
+		}
+	}
+}
+
 static struct irq_chip ipu_irq_chip = {
 	.name		= "ipu_irq",
 	.irq_ack	= ipu_irq_ack,
@@ -343,9 +381,9 @@ int __init ipu_irq_attach_irq(struct ipu *ipu, struct platform_device *dev)
 		irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
 	}
 
-	irq_set_chained_handler_and_data(ipu->irq_fn, ipu_irq_handler, ipu);
+	irq_set_chained_handler_and_data(ipu->irq_fn, ipu_irq_fn, ipu);
 
-	irq_set_chained_handler_and_data(ipu->irq_err, ipu_irq_handler, ipu);
+	irq_set_chained_handler_and_data(ipu->irq_err, ipu_irq_err, ipu);
 
 	ipu->irq_base = irq_base;
 
-- 
2.7.4

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