On Thu, Jul 07, 2016 at 11:35:51AM +0200, Lucas Stach wrote: > From: Michael Olbrich <m.olbrich@xxxxxxxxxxxxxx> > > Currently the handler ignores the channel 0 interrupt and thus doesn't ack > it properly. This is done in order to allow sdma_run_channel0() to poll > on the irq status bit, as this function may be called in atomic context, > but needs to know when the channel has finished. > > This works mostly, as the polling happens under a spinlock, disabling IRQs > on the local CPU, leaving only a very slight race window for a spurious > IRQ to happen if the handler is executed on another CPU in an SMP system. > Still this is clearly suboptimal. > This behavior turns into a real problem on an RT system, where the spinlock > doesn't disable IRQs on the local CPU. Not acking the IRQ in the handler > in such a setup is very likely to drown the CPU in an IRQ storm, leaving > it unable to make any progress in the polling loop, leading to the IRQ > never being acked. > > Fix this by properly acknowledging the channel 0 IRQ in the handler. > As the IRQ status bit can no longer be used to poll for the channel > completion, switch over to using the SDMA_H_STATSTOP register for this > purpose, where bit 0 is cleared by the hardware when the channel is done. Applied, thanks -- ~Vinod -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
