On Tue, 2016-04-12 at 19:50 +0300, Andy Shevchenko wrote: > > I haven't read your V2 yet but on this, I'd suggest raising the > burst > > size to 32 bytes for UART (no higher) we found during bringup that > > larger sizes "fall-over and die" but, anything up to 32 bytes is OK > - > > and therefore you should be able to reduce the number of > > bursts/interrupts etc. > > It can't be more that FIFO size and recommendation as far as I know > is > FIFO/2, which is exactly 8 bytes. Why not ? We went as high as 32 bytes previously in the BSP with no obvious errors. At 8 bytes or 1/2 of the FIFO size I'd ask the question is DMA even worth it i.e. does it take more time to setup and execute a DMA transaction @ 1/2 FIFO size than just writing straight into the FIFO ? --- bod -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
