During stress test on Intel Edison board (Intel Tangier SoC) few issues were found. Fix them in this series. Critical issues are proposed to stable. Andy Shevchenko (6): dmaengine: hsu: set HSU_CH_MTSR to memory width dmaengine: hsu: correct use of channel status register dmaengine: hsu: correct residue calculation of active descriptor dmaengine: hsu: allow more than 3 descriptors dmaengine: hsu: don't check direction of timeouted channel dmaengine: hsu: set maximum allowed segment size for DMA drivers/dma/hsu/hsu.c | 21 +++++++++++++-------- drivers/dma/hsu/hsu.h | 7 +++++++ 2 files changed, 20 insertions(+), 8 deletions(-) -- 2.7.0 -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
