Re: [PATCH] dmaengine: dw: fix a typo for bitfields of CTL_LO

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On Thu, Jan 7, 2016 at 2:39 AM, Jie Yang <yang.jie@xxxxxxxxx> wrote:
> The offset of SINC should be 9, not 7, here fix this
> typo.

Nice!
Acked-by: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>

>
> Signed-off-by: Jie Yang <yang.jie@xxxxxxxxx>
> ---
>  drivers/dma/dw/regs.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
> index 241ff2b..0a50c18 100644
> --- a/drivers/dma/dw/regs.h
> +++ b/drivers/dma/dw/regs.h
> @@ -150,7 +150,7 @@ enum dw_dma_msize {
>  #define DWC_CTLL_DST_INC       (0<<7)          /* DAR update/not */
>  #define DWC_CTLL_DST_DEC       (1<<7)
>  #define DWC_CTLL_DST_FIX       (2<<7)
> -#define DWC_CTLL_SRC_INC       (0<<7)          /* SAR update/not */
> +#define DWC_CTLL_SRC_INC       (0<<9)          /* SAR update/not */
>  #define DWC_CTLL_SRC_DEC       (1<<9)
>  #define DWC_CTLL_SRC_FIX       (2<<9)
>  #define DWC_CTLL_DST_MSIZE(n)  ((n)<<11)       /* burst, #elements */
> --
> 2.5.0
>



-- 
With Best Regards,
Andy Shevchenko
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