re: dmaengine: xdmac: Add scatter gathered memset support

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Hello Maxime Ripard,

This is a semi-automatic email about new static checker warnings.

The patch 67a6eedc4d2c: "dmaengine: xdmac: Add scatter gathered 
memset support" from Jul 6, 2015, leads to the following Smatch 
complaint:

drivers/dma/at_xdmac.c:1330 at_xdmac_prep_dma_memset_sg()
	 error: we previously assumed 'psg' could be null (see line 1242)

drivers/dma/at_xdmac.c
  1241			pstride = stride;
  1242			if (psg)
                            ^^^
psg is non-NULL if we have gone through the loop one iteration.

  1243				stride = sg_dma_address(sg) -
  1244					(sg_dma_address(psg) + sg_dma_len(psg));
  1245	
  1246			/*
  1247			 * The scatterlist API gives us only the address and
  1248			 * length of each elements.
  1249			 *
  1250			 * Unfortunately, we don't have the stride, which we
  1251			 * will need to compute.
  1252			 *
  1253			 * That make us end up in a situation like this one:
  1254			 *    len    stride    len    stride    len
  1255			 * +-------+        +-------+        +-------+
  1256			 * |  N-2  |        |  N-1  |        |   N   |
  1257			 * +-------+        +-------+        +-------+
  1258			 *
  1259			 * We need all these three elements (N-2, N-1 and N)
  1260			 * to actually take the decision on whether we need to
  1261			 * queue N-1 or reuse N-2.
  1262			 *
  1263			 * We will only consider N if it is the last element.
  1264			 */
  1265			if (ppdesc && pdesc) {
  1266				if ((stride == pstride) &&
  1267				    (sg_dma_len(ppsg) == sg_dma_len(psg))) {
  1268					dev_dbg(chan2dev(chan),
  1269						"%s: desc 0x%p can be merged with desc 0x%p\n",
  1270						__func__, pdesc, ppdesc);
  1271	
  1272					/*
  1273					 * Increment the block count of the
  1274					 * N-2 descriptor
  1275					 */
  1276					at_xdmac_increment_block_count(chan, ppdesc);
  1277					ppdesc->lld.mbr_dus = stride;
  1278	
  1279					/*
  1280					 * Put back the N-1 descriptor in the
  1281					 * free descriptor list
  1282					 */
  1283					list_add_tail(&pdesc->desc_node,
  1284						      &atchan->free_descs_list);
  1285	
  1286					/*
  1287					 * Make our N-1 descriptor pointer
  1288					 * point to the N-2 since they were
  1289					 * actually merged.
  1290					 */
  1291					pdesc = ppdesc;
  1292	
  1293				/*
  1294				 * Rule out the case where we don't have
  1295				 * pstride computed yet (our second sg
  1296				 * element)
  1297				 *
  1298				 * We also want to catch the case where there
  1299				 * would be a negative stride,
  1300				 */
  1301				} else if (pstride ||
  1302					   sg_dma_address(sg) < sg_dma_address(psg)) {
  1303					/*
  1304					 * Queue the N-1 descriptor after the
  1305					 * N-2
  1306					 */
  1307					at_xdmac_queue_desc(chan, ppdesc, pdesc);
  1308	
  1309					/*
  1310					 * Add the N-1 descriptor to the list
  1311					 * of the descriptors used for this
  1312					 * transfer
  1313					 */
  1314					list_add_tail(&desc->desc_node,
  1315						      &first->descs_list);
  1316					dev_dbg(chan2dev(chan),
  1317						"%s: add desc 0x%p to descs_list 0x%p\n",
  1318						__func__, desc, first);
  1319				}
  1320			}
  1321	
  1322			/*
  1323			 * If we are the last element, just see if we have the
  1324			 * same size than the previous element.
  1325			 *
  1326			 * If so, we can merge it with the previous descriptor
  1327			 * since we don't care about the stride anymore.
  1328			 */
  1329			if ((i == (sg_len - 1)) &&
                             ^^^^^^^^^^^^^^^^^^
  1330			    sg_dma_len(ppsg) == sg_dma_len(psg)) {
                                                ^^^^^^^^^^^^^^^

I guess the concern is if there is only one item on the list.  Not sure
if that can happen or not...

  1331				dev_dbg(chan2dev(chan),
  1332					"%s: desc 0x%p can be merged with desc 0x%p\n",

regards,
dan carpenter
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