On Fri, 2015-03-06 at 11:25 +0000, Mark Brown wrote: > On Mon, Mar 02, 2015 at 08:15:59PM +0200, Andy Shevchenko wrote: > > The logic of DMA completion is broken now since test_and_clear_bit() never > > returns the other bit is set. It means condition are always false and we have > > spi_finalize_current_transfer() called per each DMA completion which is wrong. > > > > The patch fixes logic by clearing BUSY bit first and then check for the other > > one. > > > > Fixes: 30c8eb52cc4a (spi: dw-mid: split rx and tx callbacks when DMA) > > The commit this is fixing is in v3.19 so this should go to stable but I > can't apply this against my fix/dw branch. Can you generate a version > that can be applied there please? We'll need to work out the merge > issues with the current code I gues... Hmm… Just tried apply on top on fix/dw using git am -C1 -s 0001-spi-dw-mid-clear-BUSY-flag-fist-and-test-other-one.patch It went fine with reduced context. Shall I still resend you that version? -- Andy Shevchenko <andriy.shevchenko@xxxxxxxxx> Intel Finland Oy -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html