On 09/10/2014 15:39, Geert Uytterhoeven : > On Tue, Oct 7, 2014 at 4:52 PM, Maxime Ripard > <maxime.ripard@xxxxxxxxxxxxxxxxxx> wrote: >>>>> +These various types will also affect how the source and destination >>>>> +addresses change over time, as DMA_SLAVE transfers will usually have >>>>> +one of the addresses that will increment, while the other will not, >>>>> +DMA_CYCLIC will have one address that will loop, while the other, will >>>> >>>> s/the other,/the other/ >>>> >>>>> +not change, etc. >>> >>> This is a little bit vague in my opinion. And usually, it is pretty >>> implementation specific. >> >> Which is why we can't really be more precise. If you have any other >> wording coming to your mind, I'm all for it :) > > Perhaps: > > Addresses pointing to RAM are typically incremented (or decremented) after > each transfer. In case of a ring buffer, they may loop (DMA_CYCLIC). > Addresses pointing to a device's register (e.g. a FIFO) are typically fixed. +1 ;-) Bye, -- Nicolas Ferre -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
