On Thu, May 08, 2014 at 01:49:20PM +0400, Alexander Popov wrote: > >> + case DMA_SLAVE_CONFIG: > >> + /* > >> + * Constraints: > >> + * - only transfers between a peripheral device and > >> + * memory are supported; > >> + * - minimal transfer chunk is 4 bytes and consequently > >> + * source and destination addresses must be 4-byte aligned > >> + * and transfer size must be aligned on (4 * maxburst) > >> + * boundary; > >> + * - during the transfer RAM address is being incremented by > >> + * the size of minimal transfer chunk; > >> + * - peripheral port's address is constant during the transfer. > >> + */ > >> + > >> + cfg = (void *)arg; > >> + > >> + if (cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES || > >> + cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES || > > and why this limtation, doesnt seem covered above? > I created this limitation because FIFO registers of LPC and SDHC > support _only_ 4-byte access. > > I tried to cover this limitation in the statement "minimal transfer chunk > is 4 bytes". Should I make it more explicit? expose these as capablities and try to use these in your client driver. Already we have audio drivers using those... -- ~Vinod -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
