When running dmatest with my yet-to-be submitted driver for the Intel MIC DMA
engine, dmatest detected "dma0chan3-copy5: result #8096161:completion busy
status with src_off=0x0 dst_off=0x0 len=0x40 (0)". This is caused by reading
the used cookie before the completed cookie in dma_cookie_status(), if a DMA
request is submitted in between the two reads, and completes, the completed
cookie will be newer than the used cookie value read previously. Reversing
the order of reads ensures that the completed cookie is for a DMA request
older than the used cookie.
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@xxxxxxxxx>
Reviewed-by: Sudeep Dutt <sudeep.dutt@xxxxxxxxx>
Reviewed-by: Nikhil Rao <nikhil.rao@xxxxxxxxx>
Signed-off-by: Siva Yerramreddy <siva.krishna.kumar.reddy.yerramreddy@xxxxxxxxx>
---
drivers/dma/dmaengine.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h
index 17f983a..4c96892 100644
--- a/drivers/dma/dmaengine.h
+++ b/drivers/dma/dmaengine.h
@@ -7,6 +7,7 @@
#include <linux/bug.h>
#include <linux/dmaengine.h>
+#include <asm/barrier.h>
/**
* dma_cookie_init - initialize the cookies for a DMA channel
@@ -69,8 +70,13 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan,
{
dma_cookie_t used, complete;
- used = chan->cookie;
complete = chan->completed_cookie;
+ /*
+ * If this order is not maintained, used can end up being older than
+ * complete
+ */
+ smp_rmb();
+ used = chan->cookie;
barrier();
if (state) {
state->last = complete;
--
1.8.2.2
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