Hi all, Posting V8 here, a brief status of this enabling: The last two revisions trend to update the crypto code mainly. The existing AEX-XTS code was improved further before being shared with the new code. Then, the new implementation was tuned for the AES-XTS mode which aligns with the claimed use case -- dm-crypt. But, I'd say some additional change might be still needed. The overall changes in charge of the last review: * PATCH12: - Clarify some documentation (Eric Biggers) - Simplify (Eric Biggers) and cleanup code * PATCH11: - Remove dead code. * PATCH10: - Deduplicate the alignment code (Eric Biggers) The series can be found in this repo: git://github.com/intel-staging/keylocker.git kl-v8 The overall diff was populated in: https://raw.githubusercontent.com/intel-staging/keylocker/diff/kl-v8-vs-v7.diff The feature is already available on recent Intel client systems. The V3 cover letter covered the usage, the threat model and other details: https://lore.kernel.org/lkml/20211124200700.15888-1-chang.seok.bae@xxxxxxxxx/ And the V6 cover followed up with updating the performance data: https://lore.kernel.org/lkml/20230410225936.8940-1-chang.seok.bae@xxxxxxxxx/ V7 posting: https://lore.kernel.org/lkml/20230524165717.14062-1-chang.seok.bae@xxxxxxxxx/ Thanks, Chang Chang S. Bae (12): Documentation/x86: Document Key Locker x86/cpufeature: Enumerate Key Locker feature x86/insn: Add Key Locker instructions to the opcode map x86/asm: Add a wrapper function for the LOADIWKEY instruction x86/msr-index: Add MSRs for Key Locker wrapping key x86/keylocker: Define Key Locker CPUID leaf x86/cpu/keylocker: Load a wrapping key at boot-time x86/PM/keylocker: Restore the wrapping key on the resume from ACPI S3/4 x86/cpu: Add a configuration and command line option for Key Locker crypto: x86/aesni - Use the proper data type in struct aesni_xts_ctx crypto: x86/aes - Prepare for a new AES-XTS implementation crypto: x86/aes-kl - Implement the AES-XTS algorithm .../admin-guide/kernel-parameters.txt | 2 + Documentation/arch/x86/index.rst | 1 + Documentation/arch/x86/keylocker.rst | 97 +++ arch/x86/Kconfig | 3 + arch/x86/crypto/Kconfig | 22 + arch/x86/crypto/Makefile | 3 + arch/x86/crypto/aes-helper_asm.S | 22 + arch/x86/crypto/aes-helper_glue.h | 161 +++++ arch/x86/crypto/aeskl-intel_asm.S | 552 ++++++++++++++++++ arch/x86/crypto/aeskl-intel_glue.c | 188 ++++++ arch/x86/crypto/aesni-intel_asm.S | 55 +- arch/x86/crypto/aesni-intel_glue.c | 241 +++----- arch/x86/crypto/aesni-intel_glue.h | 16 + arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/disabled-features.h | 8 +- arch/x86/include/asm/keylocker.h | 45 ++ arch/x86/include/asm/msr-index.h | 6 + arch/x86/include/asm/special_insns.h | 32 + arch/x86/include/uapi/asm/processor-flags.h | 2 + arch/x86/kernel/Makefile | 1 + arch/x86/kernel/cpu/common.c | 21 +- arch/x86/kernel/cpu/cpuid-deps.c | 1 + arch/x86/kernel/keylocker.c | 212 +++++++ arch/x86/kernel/smpboot.c | 2 + arch/x86/lib/x86-opcode-map.txt | 11 +- arch/x86/power/cpu.c | 2 + tools/arch/x86/lib/x86-opcode-map.txt | 11 +- 27 files changed, 1507 insertions(+), 211 deletions(-) create mode 100644 Documentation/arch/x86/keylocker.rst create mode 100644 arch/x86/crypto/aes-helper_asm.S create mode 100644 arch/x86/crypto/aes-helper_glue.h create mode 100644 arch/x86/crypto/aeskl-intel_asm.S create mode 100644 arch/x86/crypto/aeskl-intel_glue.c create mode 100644 arch/x86/crypto/aesni-intel_glue.h create mode 100644 arch/x86/include/asm/keylocker.h create mode 100644 arch/x86/kernel/keylocker.c base-commit: 054377e4774eee812b7930933d7a354ed5a7ddd6 -- 2.17.1 -- dm-devel mailing list dm-devel@xxxxxxxxxx https://listman.redhat.com/mailman/listinfo/dm-devel