On Fri, Jul 20, 2018 at 09:23:15PM +0900, Ard Biesheuvel wrote: > On 20 July 2018 at 20:45, Mark Brown <broonie@xxxxxxxxxx> wrote: > > I have to confess I didn't look at their in tree driver, looking briefly > > now it looks awfully like the hardware should be able to chain IV > > generation together with encryption without bothering the CPU which > > would be good enough. > Indeed interesting. But afaict, that would still mean that the IV > generation transform and the payload transform would be expressed as a > single crypto algorithm, e.g., 'dm(essiv-foo(aes),gcm(aes)), or the DM > layer would still need to be involved in sequencing one operation > after the other, and I don't think any of that support is in the > current series. But I'm just a drive by reviewer here, so please > correct me if I am wrong. Yeah, I'm also a bit of a drive by here and not seeing how the two are joined up at present, but it may be a case of needing to get this and/or other drivers fixed rather than the hardware lacking the capability.
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