Re: [PATCH v2] i2c: davinci: Optimize clock generation on Keystone SoC

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 




On Mon, Sep 14, 2015 at 11:03:50AM +0200, Alexander Sverdlin wrote:
> According to "KeyStone Architecture Inter-IC Control Bus User Guide", fixed
> additive part of frequency divisors (referred as "d" in the code and datasheet)
> always equals to 6, independent of module clock prescaler.
> 
>                          module clock frequency

Applied to for-next, thanks!

Attachment: signature.asc
Description: Digital signature


[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]
  Powered by Linux