docs: iommu: Documentation for smmu in hi6220 SoC.
Signed-off-by: Chen Feng <puck.chen@xxxxxxxxxxxxx>
Signed-off-by: Yu Dongbin <yudongbin@xxxxxxxxxxxxx>
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+Hi6220 SoC SMMU Device Driver devicetree document
+=======================================================================
+The Architecture of SMMU on Hi6220 SoC:
+
+ +------------------------------------------------------------------+
+ | |
+ | +---------+ +--------+ +-------------+ +-------+ |
+ | | ADE | | ISP | | V/J codec | | G3D | |
+ | +----|----+ +---|----+ +------|------+ +---|---| |
+ | | | | | |
+ | ---------v-----------v--------------v--------------v----- |
+ | Media Bus |
+ | --------------------------------|---------------|-------- |
+ | | | |
+ | +---v---------------v--------+ |
+ | | SMMU | |
+ | +----------|---------|-------+ |
+ | | | |
+ +--------------------------------------------|---------|-----------+
+ | |
+ +------------v---------v-----------+
+ | DDRC |
+ +----------------------------------+
+
+Note:
+The media system shared the same smmu IP. to access DDR memory. And all
+media IP used the same page table.
+
+Below binding describes the system mmu for media system in hi6220 platform
+
+Required properties:
+- compatible: Should be "hisilicon,hi6220-smmu" example:
+ compatible = "hisilicon,hi6220-smmu";
+- reg: A tuple of base address and size of System MMU registers.
+- interrupts: An interrupt specifier for interrupt signal of System MMU.
+- clocks: The clock used for smmu IP.
+- clock-names: The name to enable clock with clock framework.
+- #iommu-cells: The iommu-cells should be 1 for muti-master to use.
+
+Examples:
+ smmu@f4210000 {
+ compatible = "hisilicon,hi6220-smmu";
+ reg = <0x0 0xf4210000 0x0 0x1000>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sys_ctrl HI6220_MMU_CLK>,
+ <&media_ctrl HI6220_MED_MMU>,
+ <&sys_ctrl HI6220_MEDIA_PLL_SRC>;
+ clock-names = "smmu_clk",
+ "media_sc_clk",
+ "smmu_peri_clk";
+ #iommu-cells = <1>;
+ };
--
1.9.1
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