On Thursday, October 15, 2015 at 04:10:08 PM, Graham Moore wrote: > On 08/21/2015 04:20 AM, Marek Vasut wrote: > > From: Graham Moore <grmoore@xxxxxxxxxxxxxxxxxxxxx> > > > > Add support for the Cadence QSPI controller. This controller is > > present in the Altera SoCFPGA SoCs and this driver has been tested > > on the Cyclone V SoC. > > > > Signed-off-by: Graham Moore <grmoore@xxxxxxxxxxxxxxxxxxxxx> > > Signed-off-by: Marek Vasut <marex@xxxxxxx> > > [...] > > Hi, just checking in. Are there any more changes to this driver? This will need to be ported on top of the MTD changes by Cyrille , I have it in my pipeline, but it wasn't done yet. Best regards, Marek Vasut -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
